1. Field of the Invention
This invention relates to a semiconductor package, and, more specifically, to a thin profile semiconductor package and a method of manufacturing the same.
2. Description of the Related Art
In general, a conventional semiconductor package includes a substrate having a cavity of a predetermined size at the center thereof, a semiconductor die positioned in the cavity of the substrate, a plurality of conductive wires for electrically connecting the semiconductor die to the substrate, an encapsulant for covering the semiconductor die and the cavity, and a plurality of solder balls fused to one surface of the substrate.
Many semiconductor packages have a high performance and a small surface mounting area with little thickness. Recently, these semiconductor packages have been widely used for miniaturized and multi-functional electronic appliances.
Because the back side of the semiconductor die of the conventional semiconductor package may be exposed to the outside, a laser marking process occurs after the back side is masked with an adhesive. The reason that it requires the masking process, as described above, is because the energy of the laser is directly transmitted to the semiconductor die, thereby damaging the semiconductor die, when the laser marking process occurs at the back side of the bare die.
Also, since the cavity is formed at the center of the substrate in the conventional semiconductor package, a warpage phenomenon may occur during mold process. In case the warpage of the semiconductor package is severe, an additional process is required such as vacuum suction process in order to print the masking layer for the marking process on the semiconductor die and substrate uniformly. At this time, a die crack or a package crack can be induced by the forced suction, where the severe warpage is generated in the semiconductor package.
Furthermore, in the conventional semiconductor package, a wire bonding process is performed after the semiconductor die is bonded to a cover lay tape. At this time, the cover lay tape should be stabilized at a high wire bonding temperature of about 130xc2x0 C., without being transformed. However, the cost of the cover lay tape is very high, in spite of consumption goods, giving rise to an increase in the cost of the semiconductor package.
Also, in the conventional semiconductor package, a mold flash is permeated into the interface between the substrate and the cover lay tape, in which the bonding force between them is weak, thereby contaminating the substrate or ball lands, resulting in a poor semiconductor package.
Moreover, in the conventional semiconductor package, as the cover lay tape is thrown into the mold, even during the molding process, a problem occurs in that a residue of the cover lay tape remains on the surface of the substrate owing to a high temperature as well as clamping pressure.
Therefore a need existed to provide a semiconductor package and a method of producing a semiconductor package that overcomes the above problems.
A semiconductor package has a substrate comprising a resin layer of an approximate planar plate, a cavity passing through the resin layer vertically at a center area thereof, a plurality of electrically conductive patterns formed at a bottom surface of the resin layer, and a conductive plan. An adhesive layer of a predetermined thickness is formed at an upper part of an inside of the cavity. A semiconductor die is positioned inside the cavity of the substrate and has a plurality of bond pads formed at a bottom surface thereof, a bottom surface of the adhesive layer being bonded to a top surface thereof. A plurality of conductive wires for electrically connecting the bond pads of the semiconductor die to the electrically conductive patterns are formed at a bottom surface of the substrate. An encapsulant is used for covering the semiconductor die formed at the lower part of the adhesive layer, the conductive wires and the cavity. A plurality of solder balls are fused to the electrically conductive patterns, which is formed at the bottom surface of the substrate.
The present invention is best understood by reference to the following detailed description when read in conjunction with the accompanied drawings.